1. Field of the Invention
The present invention relates generally to an image data processing apparatus. More particularly, this invention relates to an image data processing apparatus which separates an image signal to a luminance component and a chrominance component and produces luminance data and chrominance data through digital signal processing.
2. Description of the Related Art
An image signal for reproducing a color image on a monitor screen includes a luminance component, a chrominance component and a sync component. The luminance component represents the tone of an image. The chrominance component expresses color. The sync component represents information about various types of synchronizations, such as horizontal synchronization and vertical synchronization. Those components are separated from one another by utilizing characteristics like the difference in amplitude between the components and phase deviation, yielding a luminance signal, a chrominance signal and a sync signal. Image processing is performed using those signals. Digital signal processing which is not easily susceptible to temperature variance, noise, etc., is likely to be used in this image processing.
FIG. 1 is a block diagram showing an image data processing apparatus, which is based on digital signal processing. FIG. 2 is a waveform chart illustrating signals that are handled in the apparatus in FIG. 1.
The image data processing apparatus includes a Y/C separator 1, an amplifier 2, an A/D converter 3, a sync detector 4, a burst detector 5, a phase-locked loop (PLL) 6, a timing signal generator 7 and an image data processor 10.
The Y/C separator 1 receives an image signal i and separates the image signal to a luminance component and a chrominance component using the phase difference of the chrominance component, thereby yielding a luminance signal y and a chrominance signal c. In the case of the NTSC form, for example, the luminance component is acquired by adding an image signal, which is the image signal i shifted by one horizontal scan period, to the image signal i. The chrominance component is acquired from the difference between the image signal i and the shifted image signal.
The amplifier 2 is a 2-channel, high-frequency amplifier configured to operate in the video frequency band, which amplifies the amplitudes of the luminance signal y and chrominance signal c to predetermined amplitudes.
The A/D converter 3 receives the amplified luminance signal y and chrominance signal c from the amplifier 2 and quantizes the luminance signal y and chrominance signal c in accordance with a reference clock signal CK to yield luminance data Y0 and chrominance data C0.
The sync detector 4 receives the image signal i and obtains a sync component from the image signal i. The detector 4 also produces a horizontal sync signal HS and a vertical sync signal VS from the acquired sync component. In this sync detection, the mixture of the horizontal sync component and vertical sync component is acquired first using the difference between the amplitude of the sync component and the amplitudes of the other signal components. The mixed component is then separated into the horizontal sync component and vertical sync component using the difference in frequency between those components.
The burst detector 5 receives the image signal i and selectively extracts a burst signal CB, as shown in FIG. 2, from the image signal i for phase synchronization of the chrominance component. The burst signal CB has a fixed, predetermined frequency (e.g., 3.58 MHZ). The burst signal CB is previously superimposed on the image signal i at a predetermined position of the image signal i, e.g., at the back porch of each horizontal blanking period. The burst signal CB is therefore selectively extracted from the image signal i at the beginning of each horizontal scan period.
The PLL 6 receives the burst signal CB from the burst detector 5 based on which it produces the reference clock signal CK. In the NTSC form, for example, the PLL 6 is configured so that a clock signal obtained by frequency-dividing the reference clock signal CK by 4 becomes synchronous with the burst signal CB. Accordingly, the reference clock signal CK having a frequency of 14.32 MHZ is produced based on the burst signal CB that has a frequency of 3.58 MHZ. Normally, the reference clock signal CK of 14.32 MHZ is used as a color sub-carrier for the modulation of a chrominance component.
The timing signal generator 7 includes a counter which operates in accordance with the reference clock signal CK. The counter frequency-divides the reference clock signal CK in accordance with the horizontal sync signal HS and the vertical sync signal VS to produce a timing signal for the horizontal scan period and a timing signal for the vertical scan period. In the NTSC form, for example, the counter generates a horizontal timing signal HD every time it counts 910 clocks of the reference clock signal CK while resetting its own count value in accordance with the horizontal sync signal HS. The counter also generates a vertical timing signal VD every time it counts 525/2 pulses of the horizontal timing signal HD while resetting its own count value in accordance with the vertical sync signal VS.
The image data processor 8 receives the luminance data Y0 and chrominance data C0 from the A/D converter 3, piece by piece, and performs predetermined signal processing to produce new luminance data Y and color difference data U and V. The color difference data U and V respectively represent the differences between the luminance signal and the red and blue components.
The process of producing the luminance data Y involves processes such as an aperture process and a gamma compensation process. The aperture process is to emphasize the contrast of an image. The gamma compensation is to compensate a visual non-linearity with respect to the luminance level. The process of producing the color difference data U and V involves processes, such as color decoding of the chrominance component, which has previously undergone balanced modulation, and white balance adjustment. Thereafter, the subtraction between the individual chrominance components and the luminance component is performed.
The image data processor 8 adjusts the output timings for the luminance data Y0 and the chrominance data C0 in such a way that the luminance data Y and the color difference data U and V are sent to the recording system or the reproducing system at the same timing.
The horizontal sync signal HS for determining the timing for the luminance component and the burst signal CB for determining the timing for the chrominance component are asynchronous with each other. The horizontal sync signal HS has a longer period than the burst signal CB. When the image signal i is supplied from a reproducing apparatus like a video tape recorder, therefore, the horizontal sync signal HS is susceptible to the influence of jittering, which occurs in the reproducing apparatus. Because of this jittering, the timing signal generator 7 produces the horizontal timing signal HD, the period of which is shifted by one to several periods, based on the reference clock signal CK. In the NTSC form, for example, under a jitter-free environment, the horizontal timing signal HD, which has a period of 910 clocks of the reference clock signal CK, is generated. However, jittering, if present, may cause the horizontal timing signal HD, having a period of 908 to 912 clocks, to be generated. This shift of the period of the horizontal timing signal HD causes a relative phase deviation between the luminance data Y and the chrominance data C.
Further, the phase difference between the horizontal sync signal HS and the burst signal CB causes a relative difference between the sampling of the luminance component and the sampling of the chrominance component when D/A conversion is performed. This difference deteriorates the quality of the reproduced image. As shown in FIG. 3, suppose that the falling timing of the horizontal sync signal HS is delayed by a time Ta from the rising timing of the reference clock signal CK. In this case, the A/D converter 3 performs sampling at a timing shifted by the time Ta to generate image data Y0. The luminance signal y should be sampled in accordance with a clock signal CK', which is synchronous with the horizontal sync signal HS and has the same period as the reference clock signal CK. When the luminance signal y is sampled in accordance with the reference clock signal CK, however, luminance data Y0 the phase of which is shifted by the time Ta from that of the chrominance data C0, is produced. It is thus necessary to detect this time Ta and compensate the phase of either the luminance data Y0 or the chrominance data C0. One way of compensating the luminance data Y0 is to combine consecutive luminance data Y0(n) and Y0(n+1) by the ratio of Tb-Ta:Ta to thereby produce compensated luminance data Y1.
The phase difference of two kinds of signals is generally detected as follows. The counter starts pulse counting at a first specific timing corresponding to a change in one of the signals, and finishes the counting at a second specific timing corresponding to a change in the other signal. The phase difference is detected based on the value counted up from the beginning of the counting to the end thereof. The reference clock signal CK has a relatively high frequency (14.32 MHZ in the NTSC form). The detection of the phase difference between the reference clock signal CK and the horizontal sync signal HS, therefore, requires a clock signal having a higher frequency and a fast counter that operates in accordance with that clock signal. This results in an enlarged circuit area of the apparatus and increased power consumption.